Jan de Muijnck-Hughes
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Systemverilog


Wiring Circuits is as easy as 0-1-Omega, or is it...

 Posted on 2022-05-31

idris  dependent-types  border-patrol  tdvcs  hdl  systemverilog 

Types as Interpreters for HDLs to Graphs.

 Posted on 2022-05-25

idris  dependent-types  border-patrol  tdvcs  hdl  systemverilog 

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